Skip to content

Verilog: $root#1797

Draft
kroening wants to merge 1 commit into
mainfrom
verilog-root
Draft

Verilog: $root#1797
kroening wants to merge 1 commit into
mainfrom
verilog-root

Conversation

@kroening
Copy link
Copy Markdown
Collaborator

@kroening kroening commented Apr 8, 2026

This adds support for 1800 2017 23.6 $root names.

This adds support for 1800 2017 23.6 $root names.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant